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AES Core CCM
AES Core CCM
 
Price: $12,000.00



Product Code: AES-CCM


Target Technology*: 		Xilinx
Intel (Altera)
Microsemi
Platinum - All FPGA Vendors [Add $2,000.00]
Lattice

Implementation Language*: 		Both VHDL and Verilog (option available for multi-project licenses only) [Add $2,000.00]
Verilog
VHDL
Description Ordering Information
 

Advanced Encryption Standard, AES with CBC-MAC (AES-CCM) IP Core

This implementation of the AES-CCM algorithm implements the full NIST draft SP800-38C specification. AES CCM combines AES in counter (CTR) mode with AES in Cipher Block Chaining (CBC) mode to provide both encryption and authentication for low to medium speed data streams. AES-CCM is not parallelisable, unlike the AES-GCM algorithm which is also offered by Algotronix, however it can be particularly area efficient at slower speeds. The AES-CCM algorithm is specified IEEE wireless networking standards including IEEE802.11 (Wifi) and in IETF RFC 3610.

This core implements aspects of the NIST SP800-38C specification such as 192 and 256 bit key lengths which are not required by the IEEE 802.11 standard, these aspects can be omitted to reduce area. The core can also provide access to the internal AES unit to implement the simple modes of AES such as ECB, CBC, OFB, CTR, CFB1, CFB8 and CFB128.

The AES-CCM core is based on our AES-G3 implementation and is supplied as a complete package of VHDL or Verilog source code. In the initial implementation data path width for AES-CCM is fixed at 32 bits although the G3 core can implement 8, 16, 32, 64 and 128 bit data path widths. A multi-project licence for AES-CCM includes a multi-project licence to AES-G3.

AES GCM Core
Internal and External Data Path Width
32, 64 or 128 bits
Cipher Modes
CCM, (if selected by compilation option ECB, CBC, CFB1, CFB8, CFB128, OFB, CTR)
Functions
Encrypt, Decrypt, Encrypt/Decrypt
Key Lengths
128, 192, 256 bits
Keyschedule Calculation
Hardware keyschedule calculation.
Datasheets:


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